1. Field of the Invention
The present invention relates to a process for fabricating a high-voltage transistor integrated in a semiconductor substrate in association with non-volatile memory cells.
Although not limited to, the invention relates to a process for fabricating a high-voltage transistor, being integrated in a semiconductor substrate along with a non-volatile memory cell, and the following description will cover this field of application for convenience of illustration only.
2. Description of the Related Art
As it is well known in this technical field, a more frequent market trend regards the demand of low-consumption and high-density logic circuits to be integrated as well as non-volatile memories, within a common semiconductor electronic device. This necessity greatly complicates the process of fabricating such integrated electronic devices because, as explained hereinafter, these circuit types are fabricated with technologies that are not fully compatible with each other. This reflects on increased manufacturing costs as well as increased difficulty to achieve high performance levels.
For example, fabricating suitable HV (High-Voltage) transistors to handle high voltages (>12V) used in programming non-volatile memory cells is a complicated process-that is not compatible with the concurrent presence of low-voltage logic circuits (microcontrollers, SRAMs, ROMs).
Another matter of concern is the speed rate of transmission of electric signals normally expected to be reached by such devices. On this account, the transistors incorporated in such devices are conventionally subjected to a silicidation treatment. This treatment basically consists of metallizing the junctions and gate regions of logic circuit transistors with silicide, and has a drawback in that it reduces the breakdown performance of the junctions.
This runs counter to the necessity to form HV transistors, which have a characterizing feature in their high resistance to breakdown.
A first prior approach to raising the value of a transistor breakdown voltage has consisted of changing the dopant levels of the source and drain junctions.
In particular HV transistors, whose breakdown voltage is provided sufficiently high to handle high bias and operating voltages, have had their source and drain junctions formed from lightly doped regions.
Although advantageous under many points of view, this prior approach has a number of drawbacks. In particular, a compromise between an admissible breakdown voltage and the active characteristics of the transistor as regards current delivery must be reached. The high serial resistance that a lightly doped junction is bound to introduce adds to the difficulty of finding an effective working point between the breakdown voltage and the transistor saturation current.
Another problem of high-voltage transistors is the high intensity of the electric fields established between the borderline of the active area and the field oxide of the transistor.